Computer Architecture
Computer Architecture Index
- Subtraction of Unsigned Numbers-2
- Computer Instructions
- Instruction Cycle
- Error Detection Codes-2
- Arithmetic Addition
- NUMBER SYSTEM
- Subtraction of Unsigned Numbers
- Input-Output and Interrupt
- Control Logic Gates
- Common Bus System-memory address
- Common Bus System
- Hardware Implementation - selective set
- Input - output Register
- Other Alphanumeric Codes
- Three-State Bus Buffers
- Binary lncrementer
- Complete Computer Description
- Computer Registers
- Register Transfer -2
- List of Logic Microoperations
- DATA TYPES
- Register-Reference Instructions
- Bus and Memory Transfers
- Error Detection Codes
- Decimal Fixed-Point Representation
- Logic Microoperations
- Determine the Type of Instruction
- BSA: Branch and Save Return Address -subroutine call
- Other Binary Code
- Design of Basic Computer
- Memory Transfer
- Instruction Codes
- Complements
- Register Transfer
- ARITHMETIC SUBTRACTION
- AND to AC
- Shift Micro-operations - logical, circular, arithmetic shifts
- ADD to AC
- Memory-Reference Instructions - STA, LDA and BSA
- Stored Program Organization
- CONVERSION - INTRODUCTION
- Binary Adder-Subtractor
- Fetch and Decode
- Instruction Set Completeness
- Register Transfer Language
- Hardware Implementation
- Binary Adder
- Timing and Control
- OCTAL AND HEXADECIMAL NUMBER CONVERSION -2
- Register Transfer Language -2
- operation code
- ALPHANUMERIC REPRESENTATION
- Indirect Address
- OCTAL AND HEXADECIMAL NUMBER CONVERSION
- Floating-point representation
- Instruction Codes
- Arithmetic Logic Shift Unit
- Integer Representation
- ISZ: Increment and Skip if Zero & Control Flowchart
- STA: Store AC & BUN: Branch Unconditionally
- Control of Common Bus
- Introduction to Decimal Representation
- Program Counter
- FLOW CONTROL
- Floating-Point Representation
- Control of Registers and Memory
- LDA: Load to AC
- Bus and Memory Transfers -2
- Other Decimal Codes
- Overflow
- Complements -2
- Fixed-Point Representation
- Some Applications Hardware Implemntation
- Control of Single Flip-flops
- Timing and Control -2
- Memory-Reference Instructions
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