Integer Representation

signed numbers:

When an integer binary number is positive, the sign is represented by 0 and the magnitude by a positive binary number. When the number is negative, the sign is represented by 1 but the rest of the number may be represented in one of three possible ways:

1. Signed-magnitude representation

2. Signed-1' s complement representation

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3. Signed 2' s complement representation

The signed-magnitude representation of a negative number consists of the magnitude and a negative sign. In the other two representations, the negative number is represented in either the 1's or 2's complement of its positive value. As an example, consider the signed number 14 stored in an 8-bit register. + 14 is represented by a sign bit of 0 in the leftmost position followed by the binary equivalent of 14: 00001110. Note that each of the eight bits of the register must have a value and therefore 0' s must be inserted in the most significant positions following the sign bit. Although there is only one way to represent + 14, there are three different ways to represent - 14 with eight bits.

In signed-magnitude representation 1 0001110

In signed-1's complement representation 1 11 10001

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In signed-2's complement representation 1 11 10010

The signed-magnitude representation of - 14 is obtained from + 14 by complementing only the sign bit. The signed-1's complement representation of - 14 is obtained by complementing all the bits of + 14, including the sign bit. The signed-2' s complement representation is obtained by taking the 2' s complement of the positive number, including its sign bit.

The signed-magnitude system is used in ordinary arithmetic but is awkward when employed in computer arithmetic. Therefore, the signed-complement is normally used. The 1' s complement imposes difficulties because it has two representations of 0 (+0 and - 0). It is seldom used for arithmetic operations except in some older computers. The 1's complement is useful as a logical operation since the change of 1 to 0 or 0 to 1 is equivalent to a logical complement operation. The following discussion of signed binary arithmetic deals exclusively with the signed-2's complement representation of negative numbers.


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Frequently Asked Questions

Ans: Positive integers, including zero, can be represented as unsigned numbers. However, to represent negative integers, we need a notation for negative values. In ordinary arithmetic, a negative number is indicated by a minus sign and a positive number by a plus sign. view more..
Ans: Since we are dealing with unsigned numbers, there is really no way to get an unsigned result for the second example. view more..
Ans: The direct method of subtraction taught in elementary schools uses the borrow concept. In this method we borrow a 1 from a higher significant position when the minuend digit is smaller than the corresponding subtrahend digit. view more..
Ans: When an integer binary number is positive, the sign is represented by 0 and the magnitude by a positive binary number. When the number is negative, the sign is represented by 1 but the rest of the number may be represented in one of three possible ways: view more..
Ans: The addition of two numbers in the signed-magnitude system follows the rules of ordinary arithmetic. If the signs are the same, we add the two magnitudes and give the sum the common sign. If the signs are different, we subtract the smaller magnitude from the larger and give the result the sign of the larger magnitude. view more..
Ans: Subtraction of two signed binary numbers when negative numbers are in 2' s complement form is very simple and can be stated as follows: Take the 2's complement of the subtrahend (including the sign bit) and add it to the minuend (including the sign bit). A carry out of the sign bit position is discarded. view more..
Ans: When two numbers of n digits each are added and the sum occupies n + 1 digits, we say that an overflow occurred. When the addition is performed with paper and pencil, an overflow is not a problem since there is no limit to the width of the page to write down the sum. view more..
Ans: An overflow condition can be detected by observing the carry into the sign bit position and the carry out of the sign bit position. If these two carries are not equal, an overflow condition is produced. view more..
Ans: The representation of decimal numbers in registers is a function of the binary code used to represent a decimal digit. A 4-bit decimal code requires four flip-flops for each decimal digit. view more..
Ans: The floating-point representation of a number has two parts. The first part represents a signed, fixed-point number called the mantissa. The second part designates the position of the decimal (or binary) point and is called the exponent. The fixed-point mantissa may be a fraction or an integer. For exam ple, the decimal number +6132.789 is represented in floating-point with a fraction and an exponent as follows: view more..
Ans: A floating-point number is said to be normalized if the most significant digit of the mantissa is nonzero. For example, the decimal number 350 is normalized but 00035 is not. Regardless of where the position of the radix point is assumed to be in the mantissa, the number is normalized only if its leftmost digit is nonzero. view more..
Ans: In previous sections we introduced the most common types of binary-coded data found in digital computers. Other binary codes for decimal numbers and alphanumeric characters are sometimes used. Digital computers also employ other binary codes for special applications. A few additional binary codes encountered in digital computers are presented in this section. view more..
Ans: Binary codes for decimal digits require a minimum of four bits. Numerous different codes can be formulated by arranging four or more bits in 10 distinct possible combinations. A few possibilities are shown in Table 3-6. view more..
Ans: The ASCII code (Table 3-4) is the standard code commonly used for the transmission of binary information. Each character is represented by a 7-bit code and usually an eighth bit is inserted for parity (see Sec. 3-6). The code consists of 128 characters. Ninety-five characters represent graphic symbols that include upper- and lowercase letters, numerals zero to nine, punctuation marks, and special symbols view more..
Ans: Binary information transmitted through some form of communication medium is subject to external noise that could change bits from 1 to 0, and vice versa. An error detection code is a binary code that detects digital errors during transmission. The detected errors cannot be corrected but their presence is indicated. The usual procedure is to observe the frequency of errors. If errors occur infrequently at random, the particular erroneous information is transmitted again. If the error occurs too often, the system is checked for malfunction view more..
Ans: Parity generator and checker networl<s are logic circuits constructed with exclusive-OR functions. This is because, as mentioned in Sec. 1·2, the exclusive-OR function of three or more varia.bles is by definition an odd function. An odd function is a logic function whose value is binary 1 if, and only if, an odd function number of variables are equal to 1. According to this definition, the P( even) is the exclusive-OR of x, y, and l because it is equal to 1 when either one or all three of the variables are equal to I (Table 3-7). The P(odd) function is the complement of the P(even) function. view more..
Ans: A digital system Is an interconnection of digital hardware module. that at'ClOinpl.lsh a specific Wormation-proceaslna taslc. Digital systems vary in size and complexi.ty interacting digital &om a few integrated circuits to a complex of interconnected and computers. Digital system design invariably UBeS a modular approach. The modules are constructed &om such digital components as ules registet&, are in decoders, terconnected arithmetic with common elements data and control paths , and control logic. The to fonn various moda digital computer system. view more..
Ans: The symbolic notation used to describe the microoperation transfers among registers is called a register transfer language. The term "register transfer" implies the availability of hardware logic circuits that can perform a stated microoperation and transfer the result of the operation to the same or another register. view more..

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