Three-State Bus Buffers




A bus system can be constructed with three-state gates instead of multiplexers. A three-state gate is a digital circuit that exhibits three states. Two of the states are signals equivalent to logic 1 and 0 as in a conventional gate. The third state is a high-impedance state.The high-impedance state behaves like an open circuit, which means that the output is disconnected and does not have a logic significance. Three-state gates may perform any conventional logic, such as AND or NAND. However, the one most commonly used in the design of a bus system is the buffer gate.

The graphic symbol of a three-state buffer gate is shown in Fig. 4-4. It is distinguished from a normal buffer by having both a normal input and a control input. The control input determines the output state. When the control input is equal to 1, the output is enabled and the gate behaves like any conventional buffer, with the output equal to the normal input. When the control input is 0, the output is disabled and the gate goes to a high-impedance state, regardless of the value in the normal input. The high-impedance state of a three-state gate provides a special feature not available in other gates. Because of this feature, a large number of three-state gate outputs can be connected with wires to form a common bus line without endangering loading effects.

The construction of a bus system with three-state buffers is demonstrated in Fig. 4-5. The outputs of four buffers are connected together to form a single bus line. (It must be realized that this type of connection cannot be done with gates that do not have three-state outputs.) The control inputs to the buffers determine which of the four normal inputs will communicate with the bus line . No more than one buffer may be in the active state at any given time. The connected buffers must be controlled so that only one three-state buffer has access to the bus line while all other buffers are maintained in a highimpedance state.

One way to ensure that no more than one control input is active at any given time is to use a decoder, as shown in the diagram. When the enable input of the decoder is 0, all of its four outputs are 0, and the bus line is in a high-impedance state because all four buffers are disabled. When the enable input is active, one of the three-state buffers will be active, depending on the binary value in the select inputs of the decoder. Careful investigation will reveal that Fig. 4-5 is another way of constructing a 4 x 1 multiplexer since the circuit can replace the multiplexer in Fig. 4-3.

Topics You May Be Interested In
Fixed-point Representation Instruction Codes
Arithmetic Addition Stored Program Organization
Flow Control Instruction Cycle
Register Transfer Fetch And Decode
Binary Adder-subtractor Add To Ac

Three-State Bus Buffers

 

 

 

Topics You May Be Interested In
Data Types Other Binary Code
Conversion - Introduction Register Transfer Language -2
Octal And Hexadecimal Number Conversion Instruction Codes
Complements Timing And Control
Fixed-point Representation Determine The Type Of Instruction

 

 

 

 

Topics You May Be Interested In
Complements -2 Binary Lncrementer
Integer Representation Instruction Codes
Floating-point Representation Computer Instructions
Other Binary Code Instruction Cycle
Register Transfer Fetch And Decode

 

 

 

 

Topics You May Be Interested In
Fixed-point Representation Stored Program Organization
Floating-point Representation Indirect Address
Other Alphanumeric Codes Common Bus System-memory Address
Bus And Memory Transfers -2 Register-reference Instructions
Hardware Implementation - Selective Set Add To Ac

 

 

 

 

Topics You May Be Interested In
Complements Shift Micro-operations - Logical, Circular, Arithmetic Shifts
Complements -2 Operation Code
Subtraction Of Unsigned Numbers-2 Instruction Cycle
Flow Control Fetch And Decode
Logic Microoperations Bsa: Branch And Save Return Address -subroutine Call

 

To construct a common bus for four registers of n bits each using three-state buffers, we need n circuits with four buffers in each as shown in Fig. 4-5. Each group of four buffers receives one significant bit from the four registers. Each common output produces one of the lines for the common bus for a total of n lines. Only one decoder is necessary to select between the four registers.



Frequently Asked Questions

+
Ans: The two selection lines S1 and S0 are connected to the selection inputs of all four multiplexers. The selection lines choose the four bits of one register and transfer them into the four-line common bus. When S1S0 = 00, the 0 data inputs of all four multiplexers are selected and applied to the outputs that form the bus view more..
+
Ans: A typical digital computer has many registers, and paths must be provided to transfer information from one register to another. The number of wires will be excessive if separate lines are used between each register and all other registers in the system. view more..
+
Ans: where P is a control signal generated in the control section. It is sometimes convenient to separate the control variables from the register transfer operation by specifying a control function. view more..
+
Ans: A bus system can be constructed with three-state gates instead of multiplexers. A three-state gate is a digital circuit that exhibits three states. Two of the states are signals equivalent to logic 1 and 0 as in a conventional gate. The third state is a high-impedance state. view more..
+
Ans: The operation of a memory unit was described in Sec. 2-7. The transfer of information from a memory word to the outside environment is called a read operation. view more..
+
Ans: To implement the add microoperation with hardware, we need the registers that hold the data and the digital component that performs the arithmetic addition. The digital circuit that forms the arithmetic sum of two bits and a previous carry is called a full-adder . view more..
+
Ans: The subtraction of binary numbers can be done most conveniently by means of complements as discussed in Sec. 3-2. Remember that the subtraction A - B can be done by taking the 2's complement of B and adding it to A. The 2's complement can be obtained by taking the 1' s complement and adding one to the least significant pair of bits. The 1's complement can be implemented with inverters and a one can be added to the sum through the input carry. view more..
+
Ans: The increment microoperation adds one to a number in a register. For example, if a 4-bit register has a binary value 0110, it will go toO! II afterit is incremented. This microoperation is easily implemented with a binary counter view more..
+
Ans: Logic microoperations specify binary operations for strings of bits stored in registers. These operations consider each bit of the register separately and treat them as binary variables. For example, the exclusive-OR microoperation with the contents of two registers . view more..
+
Ans: There are 16 different logic operations that can be performed with two binary variables. They can be determined from all possible truth tables obtained with two binary variables as shown in Table 4-5. In this table, each of the 16 columns F0 through F15 represents a truth table of one possible Boolean function for the view more..
+
Ans: The hardware implementation of logic rnicrooperations requires that logic gates be inserted for each bit or pair of bits in the registers to perform the required logic function. Although there are 16 logic rnicrooperations, most computers use only four-AND, OR, XOR (exclusive-OR), and complementfrom which all others can be derived. view more..
+
Ans: Logic microoperations are very useful for manipulating individual bits or a portion of a word stored in a register. They can be used to change bit values, delete a group of bits, or insert new bit values into a register. view more..
+
Ans: The selective-set operation sets to 1 the bits in register A where there are corresponding 1's in register B. It does not affect bit positions that have D's in B. The following numerical example clarifies this operation. view more..
+
Ans: Shift rnicrooperations are used for serial transfer of data. They are also used in conjunction with arithmetic, logic, and other data-processing operations. The contents of a register can be shifted to the left or the right. At the same time that the bits are shifted, the first flip-flop receives its binary information from the serial input view more..
+
Ans: Instead of having individual registers performing the microoperations directly, computer systems employ a number of storage registers connected to a common operational unit called an arithmetic logic unit, abbreviated ALU. view more..
+
Ans: In this chapter we introduce a basic computer and show how its operation can be puter specified with register is defined by its internal transfer registers, statements. the limirlg The otganization and control of structure, the comand the set of instructions that It uses. The design of the computer is then carried out in detall. Although the basic computer presented in this chap view more..
+
Ans: An instruction code is a group of bits that instruct the computer to perform a specific operation. It is usually divided into parts, each having its own particular interpretation. The most basic part of an instruction code is its operation part. The operation code of an instruction is a group of bits that define such operations as add, view more..
+
Ans: The simplest way to organize a computer is to have one processor register and an instruction code format with two parts. The first part specifies the operation to be performed and the second specifies an address. The memory address tells the control where to find an operand in memory. This operand is read from memory and used as the data to be operated on together with the data stored in the processor register view more..




Rating - 3/5
542 views

Advertisements