Error Detection Codes-2




Parity generator and checker network logic circuits constructed with exclusive-OR functions. This is because, as mentioned in Sec. 1·2, the exclusive-OR function of three or more varia.bles is by definition an odd function. An odd function is a logic function whose value is binary 1 if, and only if, an odd function number of variables are equal to 1. According to this definition, the P( even) is the exclusive-OR of x, y, and l because it is equal to 1 when either one or all three of the variables are equal to I (Table 3-7). The P(odd) function is the complement of the P(even) function.

Error Detection Codes-2

 

 

 

 

 

 

 

 

As an example, consider a 3-bit me&Sllge to be transmitted with an odd parity bit. At the sending end, the odd·parity bit is generated by a parity generator circuit. As shown in Fig. 3-3, this circuit consists of one exclusive-OR and one exclusive-NOR gate. Since P(even) is the exclusive-OR of x, y, z, and P(odd) is the complement of P(even), it is necessary to employ an exclusiveNOR gate for the needed complementation. The message and the odd-parity bit are transmitted to their destination where they are applied to a parity checker. An error has occurred during transmission if the parity of the four bits received is even, since the binary infonnation transmitted was originally odd. The output of the parity checker would be 1 when an error occurs, that is, when the number of l's in the four inputs is even. Since the exclusive-OR function of the four inputs is an odd function, we again need to complement the output by using an exclusive-NOR gate ..

Error Detection Codes-2

 

 

 

 

 

 

 

 

 

 

 

 

It is worth noting that the parity generator can use the same circuit as the parity checker if the fourth input is permanently held at a logic-Q value. The advantage of this is that the same circuit can be used for both parity generation and parity checking.

It is evident from the example above that even-parity generators and checkers can be implemented with exclusive-OR functions. Odd-parity networks need an exclusive-NOR at the output to complement the function.

 



Frequently Asked Questions

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Ans: Binary information transmitted through some form of communication medium is subject to external noise that could change bits from 1 to 0, and vice versa. An error detection code is a binary code that detects digital errors during transmission. The detected errors cannot be corrected but their presence is indicated. The usual procedure is to observe the frequency of errors. If errors occur infrequently at random, the particular erroneous information is transmitted again. If the error occurs too often, the system is checked for malfunction view more..
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Ans: The ASCII code (Table 3-4) is the standard code commonly used for the transmission of binary information. Each character is represented by a 7-bit code and usually an eighth bit is inserted for parity (see Sec. 3-6). The code consists of 128 characters. Ninety-five characters represent graphic symbols that include upper- and lowercase letters, numerals zero to nine, punctuation marks, and special symbols view more..
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Ans: Binary codes for decimal digits require a minimum of four bits. Numerous different codes can be formulated by arranging four or more bits in 10 distinct possible combinations. A few possibilities are shown in Table 3-6. view more..
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Ans: Parity generator and checker networl<s are logic circuits constructed with exclusive-OR functions. This is because, as mentioned in Sec. 1·2, the exclusive-OR function of three or more varia.bles is by definition an odd function. An odd function is a logic function whose value is binary 1 if, and only if, an odd function number of variables are equal to 1. According to this definition, the P( even) is the exclusive-OR of x, y, and l because it is equal to 1 when either one or all three of the variables are equal to I (Table 3-7). The P(odd) function is the complement of the P(even) function. view more..
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Ans: A digital system Is an interconnection of digital hardware module. that at'ClOinpl.lsh a specific Wormation-proceaslna taslc. Digital systems vary in size and complexi.ty interacting digital &om a few integrated circuits to a complex of interconnected and computers. Digital system design invariably UBeS a modular approach. The modules are constructed &om such digital components as ules registet&, are in decoders, terconnected arithmetic with common elements data and control paths , and control logic. The to fonn various moda digital computer system. view more..
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Ans: The symbolic notation used to describe the microoperation transfers among registers is called a register transfer language. The term "register transfer" implies the availability of hardware logic circuits that can perform a stated microoperation and transfer the result of the operation to the same or another register. view more..
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Ans: Computer registers are designated by capital letters (sometimes followed by numerals) to denote the function of the register. For example, the register that holds an address for the memory unit is usually called a memory address register and is designated by the name MAR. view more..
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Ans: where P is a control signal generated in the control section. It is sometimes convenient to separate the control variables from the register transfer operation by specifying a control function. view more..
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Ans: A typical digital computer has many registers, and paths must be provided to transfer information from one register to another. The number of wires will be excessive if separate lines are used between each register and all other registers in the system. view more..
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Ans: The two selection lines S1 and S0 are connected to the selection inputs of all four multiplexers. The selection lines choose the four bits of one register and transfer them into the four-line common bus. When S1S0 = 00, the 0 data inputs of all four multiplexers are selected and applied to the outputs that form the bus view more..
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Ans: A bus system can be constructed with three-state gates instead of multiplexers. A three-state gate is a digital circuit that exhibits three states. Two of the states are signals equivalent to logic 1 and 0 as in a conventional gate. The third state is a high-impedance state. view more..
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Ans: The operation of a memory unit was described in Sec. 2-7. The transfer of information from a memory word to the outside environment is called a read operation. view more..
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Ans: To implement the add microoperation with hardware, we need the registers that hold the data and the digital component that performs the arithmetic addition. The digital circuit that forms the arithmetic sum of two bits and a previous carry is called a full-adder . view more..
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Ans: The subtraction of binary numbers can be done most conveniently by means of complements as discussed in Sec. 3-2. Remember that the subtraction A - B can be done by taking the 2's complement of B and adding it to A. The 2's complement can be obtained by taking the 1' s complement and adding one to the least significant pair of bits. The 1's complement can be implemented with inverters and a one can be added to the sum through the input carry. view more..
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Ans: The increment microoperation adds one to a number in a register. For example, if a 4-bit register has a binary value 0110, it will go toO! II afterit is incremented. This microoperation is easily implemented with a binary counter view more..
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Ans: Logic microoperations specify binary operations for strings of bits stored in registers. These operations consider each bit of the register separately and treat them as binary variables. For example, the exclusive-OR microoperation with the contents of two registers . view more..
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Ans: There are 16 different logic operations that can be performed with two binary variables. They can be determined from all possible truth tables obtained with two binary variables as shown in Table 4-5. In this table, each of the 16 columns F0 through F15 represents a truth table of one possible Boolean function for the view more..
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Ans: The hardware implementation of logic rnicrooperations requires that logic gates be inserted for each bit or pair of bits in the registers to perform the required logic function. Although there are 16 logic rnicrooperations, most computers use only four-AND, OR, XOR (exclusive-OR), and complementfrom which all others can be derived. view more..




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