Computer Architecture
Computer Architecture Index
- Other Binary Code
- Timing and Control
- Control of Common Bus
- Register-Reference Instructions
- Design of Basic Computer
- STA: Store AC & BUN: Branch Unconditionally
- Memory-Reference Instructions - STA, LDA and BSA
- Shift Micro-operations - logical, circular, arithmetic shifts
- Input - output Register
- Fetch and Decode
- Determine the Type of Instruction
- Logic Microoperations
- Input-Output and Interrupt
- Common Bus System
- ISZ: Increment and Skip if Zero & Control Flowchart
- Stored Program Organization
- Other Alphanumeric Codes
- Bus and Memory Transfers -2
- BSA: Branch and Save Return Address -subroutine call
- Three-State Bus Buffers
- Complements
- Instruction Codes
- Indirect Address
- Computer Registers
- Program Counter
- Common Bus System-memory address
- Computer Instructions
- Instruction Set Completeness
- Timing and Control -2
- Instruction Cycle
- Memory-Reference Instructions
- AND to AC
- ADD to AC
- LDA: Load to AC
- Complete Computer Description
- Control Logic Gates
- Control of Registers and Memory
- Control of Single Flip-flops
- DATA TYPES
- NUMBER SYSTEM
- CONVERSION - INTRODUCTION
- OCTAL AND HEXADECIMAL NUMBER CONVERSION
- OCTAL AND HEXADECIMAL NUMBER CONVERSION -2
- Introduction to Decimal Representation
- ALPHANUMERIC REPRESENTATION
- Complements -2
- Subtraction of Unsigned Numbers
- Subtraction of Unsigned Numbers-2
- Fixed-Point Representation
- Integer Representation
- Arithmetic Addition
- ARITHMETIC SUBTRACTION
- Overflow
- FLOW CONTROL
- Decimal Fixed-Point Representation
- Floating-Point Representation
- Floating-point representation
- Other Decimal Codes
- Error Detection Codes
- Error Detection Codes-2
- Register Transfer Language
- Register Transfer Language -2
- Register Transfer
- Register Transfer -2
- Bus and Memory Transfers
- Memory Transfer
- Binary Adder
- Binary Adder-Subtractor
- Binary lncrementer
- List of Logic Microoperations
- Hardware Implementation
- Some Applications Hardware Implemntation
- Hardware Implementation - selective set
- Arithmetic Logic Shift Unit
- Instruction Codes
- operation code
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