Computer Architecture
Computer Architecture Index
- Timing and Control
- Hardware Implementation - selective set
- Introduction to Decimal Representation
- ALPHANUMERIC REPRESENTATION
- Common Bus System
- Program Counter
- Hardware Implementation
- Memory Transfer
- Shift Micro-operations - logical, circular, arithmetic shifts
- Other Alphanumeric Codes
- Instruction Set Completeness
- Complements
- Bus and Memory Transfers
- Memory-Reference Instructions - STA, LDA and BSA
- ISZ: Increment and Skip if Zero & Control Flowchart
- Overflow
- Three-State Bus Buffers
- Design of Basic Computer
- Arithmetic Logic Shift Unit
- BSA: Branch and Save Return Address -subroutine call
- Binary Adder-Subtractor
- AND to AC
- Logic Microoperations
- Register-Reference Instructions
- Input-Output and Interrupt
- ARITHMETIC SUBTRACTION
- Other Decimal Codes
- Decimal Fixed-Point Representation
- Instruction Cycle
- OCTAL AND HEXADECIMAL NUMBER CONVERSION -2
- STA: Store AC & BUN: Branch Unconditionally
- Indirect Address
- Instruction Codes
- Error Detection Codes
- operation code
- Subtraction of Unsigned Numbers-2
- Complete Computer Description
- Determine the Type of Instruction
- Input - output Register
- Subtraction of Unsigned Numbers
- DATA TYPES
- Register Transfer Language -2
- Binary lncrementer
- Arithmetic Addition
- Stored Program Organization
- Computer Registers
- Other Binary Code
- Integer Representation
- Floating-Point Representation
- Computer Instructions
- Control Logic Gates
- List of Logic Microoperations
- Fixed-Point Representation
- Complements -2
- ADD to AC
- Control of Registers and Memory
- Control of Common Bus
- Binary Adder
- OCTAL AND HEXADECIMAL NUMBER CONVERSION
- Register Transfer Language
- LDA: Load to AC
- NUMBER SYSTEM
- Some Applications Hardware Implemntation
- CONVERSION - INTRODUCTION
- FLOW CONTROL
- Bus and Memory Transfers -2
- Floating-point representation
- Fetch and Decode
- Control of Single Flip-flops
- Instruction Codes
- Register Transfer -2
- Common Bus System-memory address
- Register Transfer
- Error Detection Codes-2
- Memory-Reference Instructions
- Timing and Control -2
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