Computer Architecture
Computer Architecture Index
- Stored Program Organization
- Instruction Set Completeness
- operation code
- Shift Micro-operations - logical, circular, arithmetic shifts
- Three-State Bus Buffers
- Computer Instructions
- ALPHANUMERIC REPRESENTATION
- Indirect Address
- Register Transfer
- Timing and Control
- Memory-Reference Instructions - STA, LDA and BSA
- Integer Representation
- Determine the Type of Instruction
- Bus and Memory Transfers
- Complete Computer Description
- Arithmetic Addition
- BSA: Branch and Save Return Address -subroutine call
- Fixed-Point Representation
- ISZ: Increment and Skip if Zero & Control Flowchart
- FLOW CONTROL
- Floating-point representation
- Floating-Point Representation
- Program Counter
- Binary Adder-Subtractor
- Some Applications Hardware Implemntation
- Computer Registers
- List of Logic Microoperations
- ARITHMETIC SUBTRACTION
- Overflow
- Decimal Fixed-Point Representation
- Other Binary Code
- Register-Reference Instructions
- Bus and Memory Transfers -2
- ADD to AC
- Other Alphanumeric Codes
- OCTAL AND HEXADECIMAL NUMBER CONVERSION -2
- Design of Basic Computer
- OCTAL AND HEXADECIMAL NUMBER CONVERSION
- Introduction to Decimal Representation
- Memory Transfer
- Subtraction of Unsigned Numbers-2
- Common Bus System-memory address
- Subtraction of Unsigned Numbers
- Complements
- Error Detection Codes-2
- CONVERSION - INTRODUCTION
- Input-Output and Interrupt
- Logic Microoperations
- Hardware Implementation - selective set
- Common Bus System
- Hardware Implementation
- DATA TYPES
- Instruction Codes
- Register Transfer -2
- Instruction Cycle
- Fetch and Decode
- Complements -2
- NUMBER SYSTEM
- Binary Adder
- AND to AC
- Control Logic Gates
- Input - output Register
- Register Transfer Language -2
- Instruction Codes
- LDA: Load to AC
- Control of Registers and Memory
- Arithmetic Logic Shift Unit
- Error Detection Codes
- Control of Single Flip-flops
- STA: Store AC & BUN: Branch Unconditionally
- Binary lncrementer
- Other Decimal Codes
- Control of Common Bus
- Register Transfer Language
- Memory-Reference Instructions
- Timing and Control -2
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