Computer Architecture Computer Architecture - COMPUTER-ARCHITECTURE
Computer Architecture Index
- Shift Micro-operations - logical, circular, arithmetic shifts
- Introduction to Decimal Representation
- ISZ: Increment and Skip if Zero & Control Flowchart
- Timing and Control
- Common Bus System
- Complete Computer Description
- Arithmetic Logic Shift Unit
- Logic Microoperations
- CONVERSION - INTRODUCTION
- Design of Basic Computer
- ALPHANUMERIC REPRESENTATION
- Complements
- Memory-Reference Instructions - STA, LDA and BSA
- DATA TYPES
- Input - output Register
- ARITHMETIC SUBTRACTION
- Arithmetic Addition
- Bus and Memory Transfers
- Integer Representation
- Decimal Fixed-Point Representation
- Control of Registers and Memory
- NUMBER SYSTEM
- BSA: Branch and Save Return Address -subroutine call
- Register-Reference Instructions
- Subtraction of Unsigned Numbers-2
- List of Logic Microoperations
- Subtraction of Unsigned Numbers
- Memory Transfer
- Input-Output and Interrupt
- Program Counter
- OCTAL AND HEXADECIMAL NUMBER CONVERSION -2
- OCTAL AND HEXADECIMAL NUMBER CONVERSION
- Stored Program Organization
- Overflow
- Hardware Implementation - selective set
- Instruction Set Completeness
- Binary Adder
- Computer Instructions
- Three-State Bus Buffers
- Control of Single Flip-flops
- Fixed-Point Representation
- Control of Common Bus
- Instruction Codes
- Hardware Implementation
- Some Applications Hardware Implemntation
- Binary lncrementer
- Instruction Codes
- operation code
- Floating-point representation
- Register Transfer -2
- Control Logic Gates
- Register Transfer Language
- Bus and Memory Transfers -2
- Determine the Type of Instruction
- Floating-Point Representation
- FLOW CONTROL
- Other Alphanumeric Codes
- Error Detection Codes
- Register Transfer Language -2
- Other Decimal Codes
- ADD to AC
- STA: Store AC & BUN: Branch Unconditionally
- Instruction Cycle
- Fetch and Decode
- Other Binary Code
- Common Bus System-memory address
- Computer Registers
- Complements -2
- LDA: Load to AC
- Binary Adder-Subtractor
- Register Transfer
- Error Detection Codes-2
- Indirect Address
- AND to AC
- Timing and Control -2
- Memory-Reference Instructions
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